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The public defense of Mohammad Ashjaeis licentiate thesis in Computer Science and Engineering will take place at Mälardalen University on November 18, 2014, at 13.30 PM in room Delta, Västerås.
The title of the thesis is “Multi-Hop Real-Time Communication over Switched Ethernet Technology”.
The examining committee consists of Professor Jean-Luc Scharbarg, IRIT University of Toulouse; Associate Professor Lucia Lo Bello, University of Catania; Professor Mats Björkman, MDH; Among the members of the examining committee, Professor Jean-Luc Scharbarg has been appointed the faculty examiner.
Reserve; Associate Professor Jan Carlson, MDH.
Switched Ethernet technology has been introduced to be exploited in real-time communication systems promoted by its features such as high throughput and wide availability. Given the wide availability of switched Ethernet technology, it is also a cost-effective solution. In recent years many real-time switched Ethernet protocols have been developed. However, there is a challenge in preserving the profits of traditional Ethernet technology, and at the same time overcoming the limitations imposed by using Commercial Off The Shelf (COTS) switches. These limitations mainly originate from the non-deterministic behavior of such Ethernet switches inherent in the use of FIFO queues for internal message buffering, and a limited number of priority levels available to differentiate messages.
In our research we focus on two particular solutions to provide real-time communication using switched Ethernet technology, one based on COTS Ethernet switches named the FTT-SE architecture and the other using a modified Ethernet switch called the HaRTES architecture. Both architectures are based on a master-slave technique and they support different and temporally isolated traffic types including synchronous and asynchronous traffic. Also, they provide mechanisms implementing adaptivity as a response to the requirements imposed by dynamic real-time applications. Nevertheless, the two mentioned architectures were originally developed for a simple network consisting of a single switch, and they were lacking support for multi-hop communication. In industrial applications, multi-hop communication is essential as the networks comprise a high number of nodes that is far beyond the capability of a single switch.
In this thesis, we study the challenges of providing multi-hop communication using the FTT-SE and HaRTES architectures. We propose different architectures to provide multi-hop communication while preserving the key characteristics of the original single-switch architecture, such as timeliness guarantee, resource efficiency, adaptivity and dynamicity. We develop a response time analysis for each proposed architecture and we compare them to assess their corresponding benefits and limitations. Further, we develop a simulation tool to evaluate the solutions.