Marcus Jägemar, Associated Senior Lecturer


Marcus Jägemar is currently working as a capacity and performance expert at Ericsson with a part-time assignment as a senior lecturer at Mälardalen University. Marcus is currently supervising two Ph.D. students and participate in several research initiatives.

Marcus studied Computer Engineering at the Mid Sweden University, Sundsvall, Sweden, and at the University of Greenwich, London, UK. He received his M.Sc. in Computer Engineering from Mid Sweden Univerity in 2000. He has since then mainly been working in various roles within Ericsson, both as a consultant and later as a regular employee. Marcus received his Lic. degree in 2016 and his Ph.D. in 2018. within the Mälardalen University DPAC project.

His primary academic interest is to improve the performance of large-scale telecommunication systems through efficient shared hardware resource management.

Marcus' main research interest is how low-level hardware capacity correlates to high-level system performance for both embedded and cloud-based systems.

Embedded systems may have limited hardware capacity due to power/cost/space limitations. How can define and implement the best possible hardware for a given software system? How will cache sizes and cache architectures affect the system performance is a vital question for large-scale systems.

Cloud-based systems have, typically, higher-spec hardware than embedded systems. Nevertheless, it is still important to keep power consumption to a minimum for the given system performance. How can we correctly dimension the cloud-system to meet the system-level requirements?

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Latest publications:

Automatic Quality of Service Control in Multi-core Systems using Cache Partitioning (Oct 2021)
Jakob Danielsson, Tiberiu Seceleanu, Marcus Jägemar, Moris Behnam, Mikael Sjödin
26th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA 2021)

Automatic Platform-Independent Monitoring and Ranking of Hardware Resource Utilization (Sep 2021)
Shamoona Imtiaz, Jakob Danielsson, Moris Behnam, Gabriele Capannini, Jan Carlson, Marcus Jägemar
26th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA 2021)

LLM-shark -- A Tool for Automatic Resource-boundness Analysis and Cache Partitioning Setup (Sep 2021)
Jakob Danielsson, Tiberiu Seceleanu, Marcus Jägemar, Moris Behnam, Mikael Sjödin
Intelligent and Resilient Computing for a Collaborative World (COMPSAC 2021)

Modelling Application Cache Behavior using Regression Models (Sep 2021)
Jakob Danielsson, Janne Suuronen , Tiberiu Seceleanu, Marcus Jägemar, Moris Behnam, Mikael Sjödin
The 11th IEEE International Workshop on Industrial Experience in Embedded Systems Design (IEESD 2021) (IEESD 2021)

Towards Automatic Application Fingerprinting Using Performance Monitoring Counters (May 2021)
Shamoona Imtiaz, Jakob Danielsson, Moris Behnam, Gabriele Capannini, Jan Carlson, Marcus Jägemar
7th international Conference on the Engineering of Computer Based Systems (ECBS 2021)

Resource Dependency Analysis in Multi-Core Systems (Aug 2020)
Jakob Danielsson, Tiberiu Seceleanu, Marcus Jägemar, Moris Behnam, Mikael Sjödin
44th Annual Computers, Software, and Applications Conference (COMPSAC 2020)

PhD students supervised as assistant supervisor:

Jakob Danielsson
Shamoona Imtiaz