You are required to read and agree to the below before accessing a full-text version of an article in the IDE article repository.

The full-text document you are about to access is subject to national and international copyright laws. In most cases (but not necessarily all) the consequence is that personal use is allowed given that the copyright owner is duly acknowledged and respected. All other use (typically) require an explicit permission (often in writing) by the copyright owner.

For the reports in this repository we specifically note that

  • the use of articles under IEEE copyright is governed by the IEEE copyright policy (available at http://www.ieee.org/web/publications/rights/copyrightpolicy.html)
  • the use of articles under ACM copyright is governed by the ACM copyright policy (available at http://www.acm.org/pubs/copyright_policy/)
  • technical reports and other articles issued by M‰lardalen University is free for personal use. For other use, the explicit consent of the authors is required
  • in other cases, please contact the copyright owner for detailed information

By accepting I agree to acknowledge and respect the rights of the copyright owner of the document I am about to access.

If you are in doubt, feel free to contact webmaster@ide.mdh.se

Evaluation of an Additive WCET Model for Software Components

Fulltext:


Publication Type:

Conference/Workshop Paper

Venue:

WTR 2008 10th Brazilian Workshop on Real-time and Embedded Systems


Abstract

The use of component technology in embedded systems brings new challenges to this domain. One important issue is how to derive properties of the system when we know the properties of the system's components. When the system is real-time, it is useful to find out how component composition will affect the execution time of tasks made out of components. In this work, we use a statistical design to examine and rank different hardware features with respect to their impact on the execution time at component composition. Our results indicate, for example, that main memory latency and the block size of the L2 cache have the greatest effect, while memory bandwidth has the least effect.

Bibtex

@inproceedings{Santos1255,
author = {Marcelo Santos and Bj{\"o}rn Lisper},
title = {Evaluation of an Additive WCET Model for Software Components},
month = {May},
year = {2008},
booktitle = {WTR 2008 10th Brazilian Workshop on Real-time and Embedded Systems},
url = {http://www.es.mdh.se/publications/1255-}
}