You are required to read and agree to the below before accessing a full-text version of an article in the IDE article repository.

The full-text document you are about to access is subject to national and international copyright laws. In most cases (but not necessarily all) the consequence is that personal use is allowed given that the copyright owner is duly acknowledged and respected. All other use (typically) require an explicit permission (often in writing) by the copyright owner.

For the reports in this repository we specifically note that

  • the use of articles under IEEE copyright is governed by the IEEE copyright policy (available at http://www.ieee.org/web/publications/rights/copyrightpolicy.html)
  • the use of articles under ACM copyright is governed by the ACM copyright policy (available at http://www.acm.org/pubs/copyright_policy/)
  • technical reports and other articles issued by M‰lardalen University is free for personal use. For other use, the explicit consent of the authors is required
  • in other cases, please contact the copyright owner for detailed information

By accepting I agree to acknowledge and respect the rights of the copyright owner of the document I am about to access.

If you are in doubt, feel free to contact webmaster@ide.mdh.se

Automatic Generation of Timing Models for Timing Analysis of High-Level Code

Fulltext:


Authors:

Peter Altenbernd , Andreas Ermedahl, Björn Lisper, Jan Gustafsson

Research group:

Programming Languages

Publication Type:

Conference/Workshop Paper

Venue:

Proc. 19th International Conference on Real-Time and Network Systems (RTNS2011)

Publisher:

The IRCCyN lab.

Abstract

Traditional timing analysis is applied only in the late stages of embedded system software development, when the hardware is available and the code is compiled and linked. However, preliminary timing estimates are often needed already in early stages of system development, both for hard and soft real-time systems. If the hardware is not yet fully accessible, or the code is not yet ready to compile or link, then the timing estimation must be done for the source code rather than for the binary. This paper describes how source-level timing models can be derived automatically for given combinations of hardware architecture and compiler. The models are identified from measured execution times for a set of synthetic "training programs" compiled for the hardware platform in question. The models can be used to derive source-level WCET estimates, as well as for estimating the execution times for single program runs. Our experiments indicate that the models can predict the execution times of the final, compiled code with a deviation up to 20%.

Bibtex

@inproceedings{Altenbernd2134,
author = {Peter Altenbernd and Andreas Ermedahl and Bj{\"o}rn Lisper and Jan Gustafsson},
title = {Automatic Generation of Timing Models for Timing Analysis of High-Level Code},
editor = {S{\'e}bastien Faucou},
month = {September},
year = {2011},
booktitle = {Proc. 19th International Conference on Real-Time and Network Systems (RTNS2011)},
publisher = {The IRCCyN lab.},
url = {http://www.es.mdu.se/publications/2134-}
}