You are required to read and agree to the below before accessing a full-text version of an article in the IDE article repository.

The full-text document you are about to access is subject to national and international copyright laws. In most cases (but not necessarily all) the consequence is that personal use is allowed given that the copyright owner is duly acknowledged and respected. All other use (typically) require an explicit permission (often in writing) by the copyright owner.

For the reports in this repository we specifically note that

  • the use of articles under IEEE copyright is governed by the IEEE copyright policy (available at http://www.ieee.org/web/publications/rights/copyrightpolicy.html)
  • the use of articles under ACM copyright is governed by the ACM copyright policy (available at http://www.acm.org/pubs/copyright_policy/)
  • technical reports and other articles issued by M‰lardalen University is free for personal use. For other use, the explicit consent of the authors is required
  • in other cases, please contact the copyright owner for detailed information

By accepting I agree to acknowledge and respect the rights of the copyright owner of the document I am about to access.

If you are in doubt, feel free to contact webmaster@ide.mdh.se

PVS-NoC: Partial Virtual Channel Sharing NoC Architecture

Fulltext:


Authors:

Khalid Latif , Amir-Mohammad Rahmani , Liang Guang , Tiberiu Seceleanu, Hannu Tenhunen

Research group:

Industrial Software Engineering

Publication Type:

Conference/Workshop Paper

Venue:

2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing

Abstract

A novel architecture aiming for ideal performance and overhead tradeoff, PVS-NoC (Partial VC Sharing NoC), is presented. Virtual channel (VC) is an efficient technique to improve network performance, while suffering from large silicon and power overhead. We propose sharing the VC buffers among dual inputs, which provides the performance advantage as conventional VC-based router with minimized overhead. We reason theoretically and demonstrate quantitatively the benefits of proposed architecture by comparing to state-of-the-art NoC routers, with various traffic patterns. Extensive experiments with synthetic and real benchmarks show significant area and power saving with similar performance compared to latest VC based NoC architectures.

Bibtex

@inproceedings{Latif2239,
author = {Khalid Latif and Amir-Mohammad Rahmani and Liang Guang and Tiberiu Seceleanu and Hannu Tenhunen},
title = {PVS-NoC: Partial Virtual Channel Sharing NoC Architecture},
pages = {470--477},
month = {February},
year = {2011},
booktitle = {2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing},
url = {http://www.es.mdu.se/publications/2239-}
}