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SMT-based Synthesis of TTEthernet Schedules, a Performance Study

Fulltext:


Authors:

Francisco Pozo, Guillermo Rodriguez-Navas, Hans Hansson, Wilfried Steiner

Research group:

Formal Modelling and Analysis of Embedded Systems

Publication Type:

Conference/Workshop Paper

Venue:

10th IEEE International Symposium on Industrial Embedded Systems

Abstract

Abstract—Time-triggered networks, like TTEthernet, require adoption of a predefined schedule to guarantee low communication latency and minimal jitter. The synthesis of such schedules is a problem known to be NP-complete. In the past, specialized solvers have been used for synthesizing time-triggered schedules, but more recently general-purpose tools like Satisfiability Modulo Theories (SMT) solvers have reported synthesis of large network schedules in reasonable time for industrial purposes. An interesting characteristic of any general-purpose tool is that its configuration parameters can be tuned in order to fit specific problems and achieve increased performance. This paper presents a study identifying and assessing which SMT solver parameters have the highest impact on the performance when synthesizing schedules for time-triggered networks. The results show that with appropriate values of certain parameters, the time can be reduced significantly,

Bibtex

@inproceedings{Pozo3992,
author = {Francisco Pozo and Guillermo Rodriguez-Navas and Hans Hansson and Wilfried Steiner},
title = {SMT-based Synthesis of TTEthernet Schedules, a Performance Study},
month = {June},
year = {2015},
booktitle = {10th IEEE International Symposium on Industrial Embedded Systems},
url = {http://www.es.mdu.se/publications/3992-}
}