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Measuring the Cache Interference Cost in Preemptive Real-Time Systems

Publication Type:

Conference/Workshop Paper

Venue:

ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES04)

Publisher:

ACM Press


Abstract

Caches exploits locality of references to reduce memory access latencies and thereby improve processor performance. When an operating system switches application task or performs other kernel services, the assumption of locality may be violated because the instructions and data may no longer be in the cache when the preempted operation is resumed. Thus, these operations have an additional cache interference cost that must be taken into account when calculating or estimating the performance and responsiveness of the system.In this paper we present a simulation framework suitable for examining the cache interference cost in preemptive real-time systems. Using this framework we measure the interference cost for operating system services and a set of embedded benchmarks.The simulations show that there are a significant performance gap between the best- and worst case execution times even for simple hardware architectures. Also, the worst-case performance of some software modules was found to be more or less independent of the cache configuration. These results can be used to get a better understanding of the execution behavior of preemptive real-time systems and can serve as guidelines for choosing suitable cache configurations.

Bibtex

@inproceedings{Starner627,
author = {Johan St{\"a}rner and Lars Asplund},
title = {Measuring the Cache Interference Cost in Preemptive Real-Time Systems},
pages = {146--154},
month = {June},
year = {2004},
booktitle = {ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES04)},
publisher = {ACM Press},
url = {http://www.es.mdu.se/publications/627-}
}