You are required to read and agree to the below before accessing a full-text version of an article in the IDE article repository.

The full-text document you are about to access is subject to national and international copyright laws. In most cases (but not necessarily all) the consequence is that personal use is allowed given that the copyright owner is duly acknowledged and respected. All other use (typically) require an explicit permission (often in writing) by the copyright owner.

For the reports in this repository we specifically note that

  • the use of articles under IEEE copyright is governed by the IEEE copyright policy (available at http://www.ieee.org/web/publications/rights/copyrightpolicy.html)
  • the use of articles under ACM copyright is governed by the ACM copyright policy (available at http://www.acm.org/pubs/copyright_policy/)
  • technical reports and other articles issued by M‰lardalen University is free for personal use. For other use, the explicit consent of the authors is required
  • in other cases, please contact the copyright owner for detailed information

By accepting I agree to acknowledge and respect the rights of the copyright owner of the document I am about to access.

If you are in doubt, feel free to contact webmaster@ide.mdh.se

A model-driven framework for design and verification of embedded systems through SystemVerilog

Authors:

Muhammad Waseem Anwar, M Rashid , Farooque Azam , Muhammad Kashif , Wasi Haider

Research group:

Automated Software language and SOftware engineering

Publication Type:

Journal article

Venue:

Journal of Design Automation for Embedded Systems, Springer

Abstract

The demands of system complexity and design productivity for embedded systems can be managed by simplifying and reusing the design. Furthermore, these systems should be verified as early as possible in the development process to reduce the cost and effort. The rationale of the proposed framework in this article is to simplify the design and verification process of embedded systems in the context of Model Based System Engineering (MBSE). To achieve this, UML profile for SystemVerilog (UMLSV) is proposed to model the design and verification requirements. Particularly, we introduce various UMLSV stereotypes to model the system design (structure and behavior). Furthermore, a temporal extension of Object Constraint Language is used to capture the verification requirements (properties/constraints) in UMLSV. Consequently, the proposed framework allows the modeling of system design (structure and behavior) along with the verification aspects at higher abstraction level. Following the MBSE process, the high-level models and the verification constraints are transformed into synthesizable SystemVerilog Register Transfer Level and SystemVerilog Assertions code. This leads to perform the Assertions Based Verification of system design in the early development phases by using state-of-the-art simulators. The effectiveness of the proposed framework is demonstrated with the help of multiple case studies including Traffic Lights Controller, Unmanned Aerial Vehicle, Elevator and Car Collision Avoidance System.

Bibtex

@article{Anwar6299,
author = {Muhammad Waseem Anwar and M Rashid and Farooque Azam and Muhammad Kashif and Wasi Haider},
title = {A model-driven framework for design and verification of embedded systems through SystemVerilog},
month = {June},
year = {2021},
journal = {Journal of Design Automation for Embedded Systems, Springer },
url = {http://www.es.mdu.se/publications/6299-}
}