I'm a Ph.D. Student in the Formal Modelling and Analysis of Embedded Systems Group. I'm currently involved in the RetNet project that aims to advance the state of the art and practice in predictable real-time and Internet networking. I obtained the title of Computer Science (Msc) by the University of Illes Balears, Spain, in 2014. Currently, I am pursuing my Computer Science PhD at Mälardalen University.
I started in the world of research quantifying the reliability of a system with replicated buses based on CAN. Now, as part of my PhD, I focus on scheduling time-triggered networks in two different directions. Large-scale networks and how to cope with the increasing complexity to synthesize its schedules. Developing protocols for online scheduling reconfiguration in cases of components failures or hot insertions.
Schedule Reparability: Increasing Time-Triggered Network Recovery from Link Failures (Sep 2018) Francisco Pozo, Guillermo Rodriguez-Navas, Hans Hansson 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'18)
Cognitive Radio for Improved Reliability in a Real-Time Wireless MAC Protocol based on TDMA (Sep 2017) Pablo Gutiérrez Peón, Pedro Manuel Rodríguez , Zaloa Fernández , Francisco Pozo, Elisabeth Uhlemann, Iñaki Val , Wilfried Steiner International Conference on Emerging Technologies And Factory Automation (ETFA'17)
Schedule Synthesis for Next Generation Time-Triggered Networks (Feb 2017) Francisco Pozo, Guillermo Rodriguez-Navas, Hans Hansson, Wilfried Steiner MRTC Report, Mälardalen Real-Time Research Centre (MRTC2017)
Next Generation Real-Time Networks Based on IT Technologies (Sep 2016) Wilfried Steiner , Pablo Gutiérrez Peón, Marina Gutiérrez, Ayhan Mehmed, Guillermo Rodriguez-Navas, Elena Lisova, Francisco Pozo 21st IEEE Conference on Emerging Technologies and Factory Automation (ETFA'16)