You are required to read and agree to the below before accessing a full-text version of an article in the IDE article repository.

The full-text document you are about to access is subject to national and international copyright laws. In most cases (but not necessarily all) the consequence is that personal use is allowed given that the copyright owner is duly acknowledged and respected. All other use (typically) require an explicit permission (often in writing) by the copyright owner.

For the reports in this repository we specifically note that

  • the use of articles under IEEE copyright is governed by the IEEE copyright policy (available at http://www.ieee.org/web/publications/rights/copyrightpolicy.html)
  • the use of articles under ACM copyright is governed by the ACM copyright policy (available at http://www.acm.org/pubs/copyright_policy/)
  • technical reports and other articles issued by M‰lardalen University is free for personal use. For other use, the explicit consent of the authors is required
  • in other cases, please contact the copyright owner for detailed information

By accepting I agree to acknowledge and respect the rights of the copyright owner of the document I am about to access.

If you are in doubt, feel free to contact webmaster@ide.mdh.se

Towards A Static Cache Analysis for Whole Program Analysis

Fulltext:


Authors:


Publication Type:

Report - MRTC

Publisher:

Mälardalen University Press

ISRN:

MDH-MRTC-59/2002-1-SE


Abstract

Data caches have become very popular to overcome the gap between main memories and processors performance. Caches work well for programs with sufficient locality. Unfortunately, there are many programs that do not take advantage of them, thereby suffering large number of misses. Small modifications in the source code may change memory patterns, thereby altering the cache behaviour. If the code is modified properly, we can expect a high cache performance improvement. A detailed information about the number of misses and their causes is necessary to devise effective transformations. However, this information is very hard to obtain. This thesis describes a new method for describing the cache behaviour of whole programs.Based on a new characterisation of data reuse across multiple loop nests, we present a method, a prototyping implementation and some experimental results for analysing the cache behaviour of whole programs with regular computations. Validation against cache simulation using real codes shows the efficiency and accuracy of our method. Our method can be used to guide compiler locality optimisations and improve cache simulation performance.

Bibtex

@techreport{Vera295,
author = {Xavier Vera},
title = {Towards A Static Cache Analysis for Whole Program Analysis},
number = {ISSN 1404-3041 ISRN MDH-MRTC-59/2002-1-SE},
month = {March},
year = {2002},
publisher = {M{\"a}lardalen University Press},
url = {http://www.es.mdu.se/publications/295-}
}