HERO: Heterogeneous systems - software-hardware integration

The need for high-performance computing is increasing at a daunting pace and computational heterogeneity is the answer. High-performance computing platforms are increasingly becoming heterogeneous, meaning that they contain a combination of different computational units such as CPUs, GPUs, FPGAs, and AI accelerators. This computational power is needed both in hyped products like autonomous vehicles, but also in (maybe) less obvious cases like industrial automation where future intelligent production will be based on smart, autonomous, and collaborative industrial robots.

When this diverse range of computing architectures are put together on a single board (or a single chip even); the main challenge is to maximize the use of the huge computational power and at the same time to meet several criteria like performance, energy efficiency, real-time response, and dependability. To overcome these challenges, programmers of heterogeneous systems are expected to write parallel software, explicitly describe potential parallelism in their code, and identify which computations should be executed by which type of computational units. Currently, these activities are mostly manual, thereby difficult, slow, and error-prone.

The overall goal of HERO is to provide a framework that enables development of optimized parallel software, automatic mapping of software to heterogeneous hardware platforms, and provision of automatic hardware acceleration for the developed software.

Through HERO, Mälardalen University and five companies will develop deep competence to bridge the syntactic and semantic gap between modeling and programming languages, as well as automatically manipulating artifacts for analysis and synthesis of software for multiple heterogeneous targets. We will be able to drastically enhance the current practices for the design, analysis, and synthesis of parallel software for heterogeneous platforms. We will advance the knowledge on how to design and implement efficient functions for next-generation advanced hardware platforms and develop support for hardware programming, thanks to automatic synthesis of accelerators for heterogeneous parallel platforms.

HERO represents a substantial step towards an innovative solution for systematic and efficient development of complex heterogeneous systems. The research conducted in HERO is expected to provide substantial advances to the current state of the art in (i) model-based development and resource analysis of parallel software, (ii) pre-runtime code-level resource analysis, and (iii) automatic hardware acceleration.

The HERO team is composed of a strong group of researchers covering all aspects of the Synergy, with proven research records, and a group of companies strategically important for Swedish industry. Moreover, the Embedded Systems research environment at Mälardalen University represents the ideal soil for HERO, where we draw from, and contribute, to the rich and deep competence in embedded systems.

[Show all publications]

Optimizing Inter-Core Data-Propagation Delays in Industrial Embedded Systems under Partitioned Scheduling (Jan 2021)
Lamija Hasanagic, Tin Vidovic, Saad Mubeen, Mohammad Ashjaei, Matthias Becker
26th Asia and South Pacific Design Automation Conference (ASP-DAC'21)

Simple and Efficient Computation of Minimal Weak Control Closure (Nov 2020)
Abu Naser Masud
SAS 2020 - 27th Static Analysis Symposium (SAS 2020)

A software implemented comprehensive soft error detection method for embedded systems (Sep 2020)
Seyyed Amir Asghari , Mohammadreza Binesh Marvasti , Masoud Daneshtalab
Elsevier journal of Microprocessors and Microsystems (MICPRO)

Modelling multi-criticality vehicular software systems: evolution of an industrial component model (Jun 2020)
Alessio Bucaioni, Saad Mubeen, Federico Ciccozzi, Antonio Cicchetti, Mikael Sjödin
International Journal on Software and Systems Modeling (SoSyM'20)

A Systematic Migration Methodology for Complex Real-time Software Systems (May 2020)
Shaik Salman, Alessandro Papadopoulos, Saad Mubeen, Thomas Nolte
The 23rd International Symposium on Real-Time Distributed Computing (ISORC'20)

NOM: Network-On-Memory for Inter-Bank Data Transfer in Highly-Banked Memories (May 2020)
Seyyed Hossein Seyyedaghaei Rezaei , Mehdi Modarressi, Rachata Ausavarungnirun , Mohammad Sadrosadati , Onur Mutlu , Masoud Daneshtalab
IEEE Computer Architecture Letters (CAL)