HERO: Heterogeneous systems - software-hardware integration

The need for high-performance computing is increasing at a daunting pace and computational heterogeneity is the answer. High-performance computing platforms are increasingly becoming heterogeneous, meaning that they contain a combination of different computational units such as CPUs, GPUs, FPGAs, and AI accelerators. This computational power is needed both in hyped products like autonomous vehicles, but also in (maybe) less obvious cases like industrial automation where future intelligent production will be based on smart, autonomous, and collaborative industrial robots.

When this diverse range of computing architectures are put together on a single board (or a single chip even); the main challenge is to maximize the use of the huge computational power and at the same time to meet several criteria like performance, energy efficiency, real-time response, and dependability. To overcome these challenges, programmers of heterogeneous systems are expected to write parallel software, explicitly describe potential parallelism in their code, and identify which computations should be executed by which type of computational units. Currently, these activities are mostly manual, thereby difficult, slow, and error-prone.

The overall goal of HERO is to provide a framework that enables development of optimized parallel software, automatic mapping of software to heterogeneous hardware platforms, and provision of automatic hardware acceleration for the developed software.

Through HERO, Mälardalen University and five companies will develop deep competence to bridge the syntactic and semantic gap between modeling and programming languages, as well as automatically manipulating artifacts for analysis and synthesis of software for multiple heterogeneous targets. We will be able to drastically enhance the current practices for the design, analysis, and synthesis of parallel software for heterogeneous platforms. We will advance the knowledge on how to design and implement efficient functions for next-generation advanced hardware platforms and develop support for hardware programming, thanks to automatic synthesis of accelerators for heterogeneous parallel platforms.

HERO represents a substantial step towards an innovative solution for systematic and efficient development of complex heterogeneous systems. The research conducted in HERO is expected to provide substantial advances to the current state of the art in (i) model-based development and resource analysis of parallel software, (ii) pre-runtime code-level resource analysis, and (iii) automatic hardware acceleration.

The HERO team is composed of a strong group of researchers covering all aspects of the Synergy, with proven research records, and a group of companies strategically important for Swedish industry. Moreover, the Embedded Systems research environment at Mälardalen University represents the ideal soil for HERO, where we draw from, and contribute, to the rich and deep competence in embedded systems.

[Show all publications]

Recent Advances and Trends in On-board Embedded and Networked Automotive Systems (Feb 2019)
Lucia Lo Bello , Sergio Saponara , Saad Mubeen, Riccardo Mariani
IEEE Transactions on Industrial Informatics (IEEE-TII)

Guest Editorial: Embedded and Networked Systems for Intelligent Vehicles and Robots (Feb 2019)
Lucia Lo Bello , Saad Mubeen, Sergio Saponara , Riccardo Mariani , Unmesh Dutta Bordoloi
IEEE Transactions on Industrial Informatics (IEEE-TII)

Developing Predictable Embedded Systems in the Vehicle Industry: Results and Lessons Learned (Feb 2019)
Saad Mubeen

A Perspective on Ensuring Predictability in Time-critical and Secure Cooperative Cyber Physical Systems (Feb 2019)
Saad Mubeen, Elena Lisova, Aneta Vulgarakis Feljan
20th IEEE International Conference on Industrial Technology (ICIT 2019)

An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chip (Dec 2018)
Fahimeh Yazdanpanah , Raheel Afsharmazayejani , Amin Rezaei , Masoud Daneshtalab
The Journal of Supercomputing (Supercomputing)

A Novel Two-Step Method for Stereo Vision Algorithm to Reduce Search Space (Jun 2018)
Mehdi Kokhazadeh , Zahra Kokhazadeh , Masoud Daneshtalab
International Conference on electrical Engineering (ICEE)