Hüseyin Aysan, Post Doc (not working at IDT anymore)

Hüseyin Aysan is a Postdoctoral Researcher within the Dependability Group at Mälardalen University. He is currently involved in the SYNOPSIS project. He received his M.Sc. degree in Robotics in 2006, and his Ph.D. degree in Computer Science in 2012 both from Mälardalen University, Sweden.

His research interests include, run-time fault-tolerance techniques, fault-tolerant real-time scheduling and design-time dependability analysis of dependable real-time embedded systems.

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Latest publications:

Improving Reliability of Real-Time Systems through Value and Time Voting (Dec 2013)
Hüseyin Aysan, Iain Bate, Patrick Graydon, Sasikumar Punnekkat
The 19th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2013)

Probabilistic Schedulability Analysis for Fault Tolerant Tasks under Stochastic Error Occurrences (May 2013)
Hüseyin Aysan, Radu Dobrin, Sasikumar Punnekkat
19th International Conference on Control Systems and Computer Science

Schedulability Guarantees for Dependable Distributed Real-Time Systems under Error Bursts (Jan 2013)
Hüseyin Aysan, Radu Dobrin, Sasikumar Punnekkat
Advances in Intelligent Control Systems and Computer Science (AICSCS-13)

Resource Augmentation for Fault-Tolerance Feasibility of Real-time Tasks under Error Bursts (Nov 2012)
Abhilash Thekkilakattil, Radu Dobrin, Sasikumar Punnekkat, Hüseyin Aysan
The 20th International Conference on Real-Time and Network Systems (shortlisted for best student paper award)

Probabilistic Scheduling Guarantees in Distributed Real-Time Systems under Error Bursts (Sep 2012)
Hüseyin Aysan, Radu Dobrin, Sasikumar Punnekkat, Julián Proenza
17th IEEE International Conference on Emerging Technologies and Factory Automation

Towards Probabilistic Mode Automata for Adaptable Resource-Aware Component-Based Systems Design (Aug 2012)
Heinz Schmidt, Ian Peake, Hüseyin Aysan, Sasikumar Punnekkat, Radu Dobrin
Improving Systems and Software Engineering Conference / Software Engineering Process Groups Conference

MSc theses supervised (or examined):
Thesis TitleStatus
A failure behaviour analysis framework for Progress IDE finished